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SC74HC595
8-BIT SHIFT REGISTER (SERIAL INPUT, 3S PARALLEL OUTPUT WITH LATCHES)
DESCRIPTION
SC74HC595 utilizes advanced CMOS technology, and has 8-bit shift register with serial input, serial/parallel output and 8bit tri-state output flip-latch. The pin configuration is in accord with the 54LS/74LS series, and the operating speed is similar to 54LS/74LS. This circuit has the protecting circuit for all the inputs and outputs to avoid the damage caused by the static discharge. And it has the ability of driving load and features high noise immunity. The register and flip-latch both have separate clock inputs (SCK and RCK). The serial input data (IS) is stored into register at the rising edge of SCK; the data of register is stored into flip-latch at the rising edge of RCK. The low level of clear port ( SCLR ) only reset the register, and is no effect to fliplatch. When the control enable ( G ) is high level, the parallelout is level Z.
DIP-16-300-2.54 TSSOP-16-225-0.65 SSOP-16-300-0.65 SOP-16-300-1.27 SOP-16-225-1.27
ORDERING INFORMATION
Device SC74HC595 2~6V 1A 15 LS-TTL loads fmax=55MHz (VCC=5V) 80A SC74HC595A SC74HC595B SC74HC595C SC74HC595D Package DIP-16-300-2.54 SOP-16-225-1.27 SOP-16-300-1.27 TSSOP-16-225-0.65 SSOP-16-300-0.65
FEATURES
* Wide operating voltage range * Low input current * High output driving ability * High operating speed(Typical) * Low supply current
APPLICATIONS
* LED screen
RECOMANDED OPERATING CONDITIONS
Characteristics Power Supply Voltage Input Voltage Output Voltage Operating Temperature Symbol VCC VIN VOUT Topr VCC =2.0V Input Rise and Fall Time Tr, Tf VCC =4.5V VCC =6.0V Ratings 2~6 0~VCC 0~VCC -40~+85 0~1000 0~500 0~400 Unit V V V C ns ns ns
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SC74HC595
DC ELECTRICAL CHARACTERISTICS (Tamb=25C)
Characteristics Symbol Testing conditions VCC(V) 2.0 VIH 4.5 6.0 2.0 VIL 4.5 6.0 2.0 High Level Output Voltage ( OH' ) 4.5 VOH 6.0 4.5 6.0 2.0 High Level Output Voltage (QA~QH) 4.5 VOH 6.0 4.5 6.0 2.0 Low Level Output Voltage (OH' ) 4.5 VOL 6.0 4.5 6.0 2.0 Low Level Output Voltage (QA~QH) 4.5 VOL 6.0 4.5 6.0 Input Leakage Current Tri-state Output Current Quiescent Supply Current II IOZ ICC 6.0 6.0 6.0 VIN=VCC or GND VIN=VIH or VIL VOUT=VCC or GND VIN=VCC or GND VIN=VIH or VIL IO=6.0mA IO=7.8mA IO=20A VIN=VIH or VIL IO=4.0mA IO=5.2mA IO=20A VIN=VIH or VIL IO=-6.0mA IO=-7.8mA IO=-20A VIN=VIH or VIL IO=-4.0mA IO=-5.2mA IO=-20A Conditions Min. 1.5 3.15 4.2 ---1.9 4.4 5.9 4.18 5.68 1.9 4.4 5.9 4.18 5.68 ------------Typ. ------2.0 4.5 6.0 4.31 5.8 2.0 4.5 6.0 4.31 5.8 0.0 0.0 0.0 0.17 0.18 0.0 0.0 0.0 0.17 0.18 ---0.5 1.35 1.8 ----------0.1 0.1 0.1 0.26 0.26 0.1 0.1 0.1 0.26 0.26 0.1 0.5 4 A A A V V V V V Max. --V Unit
High Level Input Voltage
Low Level Input Voltage
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SC74HC595
DC ELECTRICAL CHARACTERISTICS (Tamb=-40~85C)
Characteristics Symbol Testing conditions VCC(V) 2.0 VIH 4.5 6.0 2.0 VIL 4.5 6.0 2.0 High Level Output Voltage ( OH' ) 4.5 VOH 6.0 4.5 6.0 2.0 High Level Output Voltage (QA~QH) 4.5 VOH 6.0 4.5 6.0 2.0 Low Level Output Voltage (OH' ) 4.5 VOL 6.0 4.5 6.0 2.0 Low Level Output Voltage (QA~QH) 4.5 VOL 6.0 4.5 6.0 Input Leakage Current Tri-state Output Current Quiescent Supply Current II IOZ ICC 6.0 6.0 6.0 VIN=VCC or GND VIN= VIH or VIL VOUT=VCC or GND VIN=VCC or GND VIN=VIH or VIL IO=6.0mA IO=7.8mA IO=20A VIN=VIH or VIL IO=4.0mA IO=5.2mA IO=20A VIN=VIH or VIL IO=-6.0mA IO=-7.8mA IO=-20A VIN=VIH or VIL IO=-4.0mA IO=-5.2mA IO=-20A Conditions Min. 1.5 3.15 4.2 ---1.9 4.4 5.9 4.13 5.63 1.9 4.4 5.9 4.13 5.63 -------------Typ. -----------------------------Max. ---0.5 1.35 1.8 ----------0.1 0.1 0.1 0.33 0.33 0.1 0.1 0.1 0.33 0.33 0.1 0.5 4 A A A V V V V V V Unit
High Level Input Voltage
Low Level Input Voltage
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SC74HC595
AC ELECTRICAL CHARACTERISTICS(CL=50pF INPUT Tr=Tf=6ns Tamb=25C)
Characteristics Symbol Testing conditions VCC(V) 2.0 Output Transition Time (Qn) tTLH tTHL 4.5 6.0 2.0 Output Transition Time (QH' ) tTLH tTHL 4.5 6.0 2.0 Propagation Delay Time(SCKQH' ) tPLH tPHL 4.5 6.0 2.0 Propagation Delay Time (SCLR-QH' ) tPLH tPHL 4.5 6.0 2.0 4.5 Propagation Delay Time (RCKQN) tPLH tPHL 6.0 2.0 4.5 6.0 2.0 4.5 Tri-state Output Enable Time tPZL tPZH 6.0 2.0 4.5 6.0 2.0 Tri-state Output Disable Time tPLZ tPHZ 4.5 6.0 2.0 4.5 6.0 Maximum Clock fMAX 2.0 4.5 6.0 150 50 50 RL=1k 150 RL=1k 50 RL=1k 150 50 50 50 50 50 CL(pF) Min. ---------------------------6.0 30 35 5.2 26 31 Typ. 25 7 6 30 8 7 45 15 13 60 18 15 60 20 17 75 25 22 45 15 13 60 20 17 30 15 14 17 50 59 14 40 45 Max. 60 12 10 75 15 13 125 25 21 175 35 30 150 30 26 190 38 32 135 27 23 175 35 30 150 30 26 ------(To be continued)
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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SC74HC595
(Continued)
Characteristics
Symbol
Testing conditions VCC(V) 2.0 CL(pF)
Min. --
Typ. 17 6 6 20 6 6 25 5 4 35 8 6 40 10 7 ---15 3 3 5 184
Max. 75 15 13 75 15 13 50 10 9 75 15 13 100 20 17 0 0 0 50 10 9 10
Unit
Minimum Pulse Width (SCK, RCK)
tW(H)
4.5 6.0 2.0
50
----
ns
Minimum Pulse Width ( SCLR )
tW(L)
4.5 6.0 2.0
50
----
ns
Minimum Set-up Time (SI-SCK)
tS
4.5 6.0 2.0
50
----
ns
Minimum Set-up Time (SCK-RCK)
tS
4.5 6.0 2.0
50
----
ns
Minimum Set-up Time ( SCLR -RCK)
tS
4.5 6.0 2.0
50
----
ns
Minimum Hold Time
tH
4.5 6.0 2.0
50
----
ns
Minimum Clear Time
tREM
4.5 6.0
50
-----
ns
Input Capacitance Power Dissipation Capacitance
CIN CPD(*)
pF pF
(*): CPD is defined as the internal equivalent capacitance of the IC. It is calculated from the operating current without load; and the average operating current can be obtained by the equation: ICC (opr) =CPD*VCC*fIN+ICC.
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SC74HC595
AC ELECTRICAL CHARACTERISTICS(CL=50pF INPUT Tr=Tf=6ns Tamb=-40~85C)
Characteristics Symbol Testing conditions VCC(V) 2.0 Output Transition Time (Qn) tTLH tTHL 4.5 6.0 2.0 Output Transition Time (QH' ) tTLH tTHL 4.5 6.0 2.0 Propagation Delay Time (SCKQH' ) tPLH tPHL 4.5 6.0 2.0 Propagation Delay Time (SCLR-QH' ) tPLH tPHL 4.5 6.0 2.0 4.5 Propagation Delay Time (RCKQN) tPLH tPHL 6.0 2.0 4.5 6.0 2.0 4.5 Tri-state Output Enable Time tPZL tPZH 6.0 2.0 4.5 6.0 2.0 Tri-state Output Disable Time tPLZ tPHZ 4.5 6.0 2.0 4.5 6.0 Maximum Clock fMAX 2.0 4.5 6.0 150 50 50 RL=1k 150 RL=1k 50 RL=1k 150 50 50 50 50 50 CL(pF) Min. ---------------------------4.8 24 28 4.2 21 25 Typ. ---------------------------------Max. 75 15 13 95 19 16 155 31 66 220 44 37 190 38 32 240 48 41 170 34 29 220 44 37 190 38 32 ------(To be continued)
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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SC74HC595
(Continued)
Characteristics
Symbol
Testing conditions VCC(V) 2.0 CL(pF)
Min. --
Typ. ------------------------
Max. 95 19 16 95 19 16 65 13 11 95 19 16 125 25 21 0 0 0 65 13 11 10 --
Unit
Minimum Pulse Width (SCK, RCK)
tW(H)
4.5 6.0 2.0
50
----
ns
Minimum Pulse Width ( SCLR )
tW(L)
4.5 6.0 2.0
50
----
ns
Minimum Set-up Time (SI-RCK)
tS
4.5 6.0 2.0
50
----
ns
Minimum Set-up Time (SCK-RCK)
tS
4.5 6.0 2.0
50
----
ns
Minimum Set-up Time ( SCLR -RCK)
tS
4.5 6.0 2.0
50
----
ns
Minimum Hold Time
tH
4.5 6.0 2.0
50
----
ns
Minimum Clear Time
tREM
4.5 6.0
50
-----
ns
Input Capacitance Power Dissipation Capacitance
CIN CPD(*)
pF pF
(*): CPD is defined as the internal equivalent capacitance of the IC. It is calculated from the operating current without load; and the average operating current can be obtained by the equation: ICC (opr) =CPD*VCC*fIN+ICC.
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SC74HC595
PIN CONFIGURATION
PIN DESCRIPTION
Pin no. 1~7, 15 9 10 11 13 14 12 8 16 Name QA ~ QH QH'
SCLR
I/O O O I I I I I I/O I/O Parallel data output Serial data output
Pin description
Reset signal of register Register clock Data output enable Serial data input Flip-latch clock Ground Power supply
SCK
G
SI RCK GND VCC
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SC74HC595
LOGIC DIAGRAM
14 11 10 3 state shift register
Serial input SI SCK SCLR
9
Serial output OH'
RCK
12
8-bit storage register
G
13
3 state buffer
VCC=16 GND=8
QA QB QC QD QE QF QG QH Parallel output ports
TIMING CHART
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SC74HC595
TRUTH TABLE
Input SI X X X X X X X X: irrelevant X X SCK X X X
SCLR
RCK X X X X X
G
H L X X X X X QA ~QH outputs disable QA ~QH outputs enable Register reset
Output
X X L H H X X
Storage the data into register at the rising edge of SCK The state of register is unchangeable Storage the data into flip-latch at the rising edge of RCK The state of flip-latch is unchangeable
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SC74HC595
PACKAGE OUTLINE
DIP-16-300-2.54 UNIT: mm
SOP-16-225-1.27
UNIT: mm
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SC74HC595
PACKAGE OUTLINE
SOP-16-300-1.27 UNIT: mm
7.800.40
5.300.30
TSSOP-16-225-0.65
UNIT: mm
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SC74HC595
PACKAGE OUTLINE
SSOP-16-300-0.65 UNIT: mm
0
8
0.180.015 0.33 0.65
6.150.20
1.650.20 0.150.05
HANDLING MOS DEVICES:
Electrostatic charges can exist in many things. All of our MOS devices are internally protected against electrostatic discharge but they can be damaged if the following precautions are not taken: * Persons at a work bench should be earthed via a wrist strap. * Equipment cases should be earthed. * All tools used during assembly, including soldering tools and solder baths, must be earthed. * MOS devices should be packed for dispatch in antistatic/conductive containers.
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